1. Field of the Invention
The present invention relates to digital display units used in computer systems, and more specifically to integrated circuits for generating digital data elements from an analog display signal received by digital display units.
2. Related Art
Digital display units (e.g., flat panel monitors) are often used to display images encoded in an analog display signal. Digital display units are characterized by screens having discreet points termed xe2x80x9cpixelsxe2x80x9d. Each pixel is actuated with different colors and intensities to generate an image. The tasks required to display the images on a screen of a digital display unit can be appreciated by considering the manner in which display signals are typically generated and the format of a typical display signal.
Analog display signals are typically generated by a digital-to-analog converter (DAC) in a graphics source generally located outside of a digital display unit. The DAC generates a portion of a display data signal (e.g., in RGB format) by processing each of several pixel data elements representing an image. Each pixel data element value generally represents the color intensity of a point of the image such that the display data signal represents the overall image frame. A DAC typically generates several such frames in quick succession and sends the resulting display signal to a digital display unit. The DAC is typically driven by a video clock, which determines the frequency at which the pixel data elements are encoded in an analog display signal.
An analog display signal so generated may have synchronization signals associated with the display data. While the display data signal identifies a color intensity for each point of an image, the synchronization signals provide a time reference such that each portion of the display data signal can be correlated with a corresponding portion of the image. In particular, VGA compatible systems generate a HSYNC signal identifying the separation of successive horizontal lines and a VSYNC signal identifying the separation of successive frames.
To display the images encoded in an analog signal, a digital display unit may need to accomplish several tasks. For example, the sampling clock may need to be recovered, the analog display data may need to be sampled using the recovered clock, and the image may need to be scaled (upscaled or downscaled) to use all the space available on a display screen.
Clock recovery is typically required to accurately regenerate the pixel data elements used at a graphics source (generating the analog display signal). That is, when the ADC is driven by an accurately recovered clock (sampling clock), the sampled data elements (generated from sampling) typically equal the pixel data elements used at the graphics source. The sampled data elements may then be used for scaling (to bigger or smaller image in any dimension) the image. The pixel data elements representing the scaled image may be used to generate display signals on a display screen.
Prior systems may implement each of these tasks in a separate integrated circuit (chip) or module. For example, a scaler may be implemented as one integrated circuit and the clock recovery circuit may be implemented as another.
Implementation as different modules or chips may be unacceptable in certain situations. For example, the manufacturing costs may be high. High costs may be unacceptable, particularly in consumer markets where computer systems may be marketed. In addition, a digital display unit may be prone to defects due to the presence of the several modules or chips.
A monolithic integrated circuit containing an analog-to-digital converter (ADC), a clock recovery circuit and a resizing (scaler) circuit is provided in accordance with the present invention. Integration is enabled while maintaining adequate display quality. In one embodiment described below, the integration of these circuits into one monolithic integrated circuit is facilitated by using digital components for tracking and phase acquisition in the clock recovery circuit and by using only a small memory in the resizing circuit.
According to another aspect of the present invention, a digital-to-analog converter (DAC) is also integrated into the monolithic integrated circuit. The DAC enables color balancing to be achieved for multiple ADCs used for processing multiple colors (e.g, Red, green and blue signals). Color balancing is of particular importance because of any sub-optimal implementation of analog components, which may cause color mis-matches when several ADCs are used, each for processing a different color.
Further features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.